Full-Custom Hardware Implementation of Point Multiplication on Binary Edwards Curves for ASIC Elliptic Curve Cryptosystem Applications

High-speed hardware implementation of Gaussian normal basis inversion algorithm over F2m

An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2m)

High-performance and High-speed implementation of Polynomial basis Itoh-Tsujii Inversion algorithm over GF(2m)

High-speed Hardware Architecture of Scalar Multiplication for Binary Elliptic Curve Cryptosystems

Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems

Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2m)

Efficient Implementation of Low Time Complexity and Pipelined Bit-Parallel Polynomial Basis Multiplier over Binary Finite Fields

FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm

A High Speed Multiplexer based and Fine-Grain Pipelined Architecture for Digital Fuzzy Logic Controllers

A High Performance and Low Power FIR Filter Based on Ring Topology with Modified Retiming Serial Multiplier on FPGA

Implementation of an Optimized and Pipelined Combinational Logic Rijndael S-Box on FPGA

FPGA Implementation of Digital Controller for Simple and Maximum Boost Control of Three Phase Z-Source Inverter

High Performance FPGA based Digital Space Vector PWM Three Phase Voltage Source Inverter

A Two Layers Novel Low-Cost and Optimized Embedded Board Based on TMS320C6713 DSP and Spartan-3 FPGA

A High Speed and Low Power Image Encryption 128-Bit With AES Algorithm

Efficient Hardware Implementations of Point Multiplication for Binary Edwards Curves

High-throughput and Flexible ASIC Implementations of SIMON and SPECK Lightweight Block Ciphers

Efficient Hardware Structure for Extended Euclidean-based Inversion over F2m

Efficient and High-throughput ASIC Implementations of HIGHT and PRESENT Block Ciphers

Efficient and Flexible Hardware Structures of the 128-bit CLEFIA Block Cipher

High-throughput and lightweight hardware structures of HIGHT and PRESENT block ciphers

Low-cost and Two-cycle Hardware Structures of PRINCE Lightweight Block Cipher

A novel approach to determining piezoelectric properties of nanogenerators based on PVDF nanofibers using iterative finite element simulation for walking energy harvesting

Flexible Structures of Lightweight Block Ciphers PRESENT, SIMON and LED

Throughput/Area Efficient Implementation of Scalable Polynomial Basis Multiplication

Flexible and High-throughput Structures of Camellia Block Cipher for Security of the Internet of Things

Low-cost and Two-cycle Hardware Structures of PRINCE Lightweight Block Cipher

Lightweight 8-bit S-box and combined S-box/S-box for Cryptographic Applications

Compact and Efficient structure of 8-bit S-box for lightweight cryptography

An adaptive multi-objective optimization method for optimum design of distribution networks

Optimized design and implementation of electrical stimuli to reduce muscle pain and treat osteoarthritis

Lightweight Cryptographic S-Boxes Based on Efficient Hardware Structures for Block Ciphers

Generating biometric random cryptographic key based on unique fingerprint features

Glitch-less Hardware Implementation of Block Ciphers based on an Efficient Glitch Filter

Efficient Full Data-path Width and Serialized Hardware Structures of SPONGENT Lightweight Hash Function

Fault-tolerant and Error-correcting 4-bit S-boxes for Cryptography Applications with Multiple Errors Detection

Error-correcting Cryptographic S-boxes with Multiple Error Detection and Correction